Similar Collections



Which interrupt is unmaskable…??
From amongst the following given scenarios determine the right one to justify interrupt mode of data transfer
How can the processor ignore other interrupts when it is servicing one
When dealing with multiple device interrupts , which mechanism is easy to implement
The interrupt servicing mechanism in which the reqesting device identifies itself to the processor to be serviced is
Which table handle stores the addresses of the interrupt handling sub-routines
Interrupts initiated by an instruction is called as
The anded output of the bits of the interrupt register and the mask register are set as input of:
____ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt
______ interrupt method uses register whose bits are set separately by interrupt signal for each device:
In daisy chaining device 0 will pass the signal only if it has
_________ method is used to establish priority by serially connecting all devices that request an interrupt
Which one of the following is true with regard to a CPU having a single interrupt request line and single interrupt grant line…??
The processor indicates to the devices that it is ready to recieve interrupts
The starting address sent by the device in vectored interrupt is called as
The code sent by the device in vectored interrupt is _____ long
In vectored interrupts, how does the device identify itself to the processor..?
DMA interface unit eliminates the need to use CPU registers to transfer data from
The average time required to reach a storage location in memory and obtain its contents is called the
The process that periodically checks the status of an I/O devices, is known as
total questions: 59





Best Answers