Which memory is difficult to interface with processor ?

COMPUTER ARCHITECTURE- BASIC COMPUTER ORGANIZATION MCQ

• The main virtue for using single Bus structure is
• ______ are used to over come the difference in data transfer speeds of various devices
• To extend the connectivity of the processor bus we use ______
• IBM developed a bus standard for their line of computers ‘PC AT’ called _____
• The bus used to connect the monitor to the CPU is ______
• ANSI stands for
• _____ register Connected to the Processor bus is a single-way transfer capable
• In multiple Bus organisation, the registers are collectively placed and referred as ______
• The main advantage of multiple bus organisation over single bus is
• The ISA standard Buses are used to connect
• Which of the following is not a form of memory ?
• Which memory is difficult to interface with processor ?
• Desirable characteristic(s) of a memory system is(are)
• The minimum time delay required between initiation of two successive memory operations is called
• For a memory system, the cycle time is
• Generally , the refreshing rate of dynamic RAMs is approximately once in
• In comparison with static RAM memory, the dynamic RAM memory has
• Disadvantage of dynamic RAM over static RAM is
• Memory consisting of electronic circuits attached into silicon chip is known as
• Which of the following is the internal memory of the system (computer) ?
• The idea of cache memory is based on
• What is the correct sequence of time delays that happen during a data transfer from a disk to memory?
• If a system is 64 bit machine , then the length of each word will be ____
• The type of memory assignment used in Intel processors is _____
• When using the Big Endian assignment to store a number, the sign bit of the number is stored in _____
• To get the physical address from the logical address generated by CPU we use ____
• _____ method is used to map logical addresses of variable length onto physical memory
• During transfer of data between the processor and memory we use ______
• Physical memory is divided into sets of finite size called as ______
• Which is true for a typical RISC architecture?
• SIMD represents an organization that ______________
• Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
• Von Neumann architecture is
• A Stack-organised Computer uses instruction of
• An n-bit microprocessor has
• PSW is saved in stack when there is a
• _________ register keeps tracks of the instructions stored in program stored in memory
• ‘Aging registers’ are
• Translation from symbolic program into Binary is done in
• MIMD stands for
• A k-bit field can specify any one of
• The time interval between adjacent bits is called the
• The communication between the components in a microcomputer takes place via the address and
• Data input command is just the opposite of a
• A binary digit is called a
• An interface that provides a method for transferring binary information between internal storage and external devices is called
• An address in main memory is called
• The information available in a state table may be represented graphically in a
• An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
• A register capable of shifting its binary information either to the right or the left is called a
• Which of the following is a main memory?
• The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is
• A successive A/D converter is
• A stack organized computer has
• A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is
• A system program that translates and executes an instruction simultaneously is
• The memory location’s address where data is to be stored is specified by ___________
• The number of instructions being executed defines the
• Energy equation of pulse of the logic transition, can be computed as
• Software compatibility levels determines
• The no of good dies/wafer are called
• 3.3 GHz Core i7 running in short bursts for
• 80% cost of a $90M warehouse is associated with,
• The no of dies/300 mm or (30 cm)wafer for die which is 1.5 cm on a side and for that die which is 1.0 cm on a side, would be
• For comparing the performance of new system, the users will simply compare execution time of its
• With respect to changing among the states of accomplishment and interruption, a measure of continuous service-accomplishment, is known as
• Sustained power consumption; the given metric is widely known as
• Databases and transaction processing support; reliability and availability enhancements are provided by
• Static power being directly proportional to no of devices, that is known as
• 15% reduction in voltage results in a 15% frequency reduction, the impact on the dynamic energy and the dynamic power, is
• The most common and simple definition of time is called
• Every easily made mistakes and flaws in the computer design and architecture, are referred to as
• The sound output has data-rate of approximately
• 1000 disks having 1,000,000-hour MTTF, if failed disks are being replaced with a new one, having the same as all having reliability characteristics, the number of disks that would be failed in a year (8760 hours) is
• Dies which are 1.5cm on a side and 1.0cm on a side, supposing a density of 0.031/per cm^2 and N is 13.5, will have die yielding
• By improving the components of the computer for the performance gain, can be calculated using
• The largest form of the clusters are called
• Different types of parallelism in the applications like:
• Benchmarks remain indefinitely valid, the given statement is referred to as
• Single instruction single data stream (SISD) category is the
• For measuring the ability of a computer system for handling the transactions that is consisted of access of database and updates of benchmark used is
• The term 'computer architecture' is sometimes referred only to
• Thousands of concentric circles, magnetic-disk are made up of are known as
• The general categories of instructions\' operation are
• A wafer is normally tested and is chopped into
• Programs which are tend to reusing data as well as instructions they have used just before, is known as
• Being able for expanding memory, no of processors and the disks is called
• SaaS is known as a growing software as a
• From a reference initial instant, a measure of service accomplishment. is known as
• The cost of the die can be calculated as
• Fake programs that are made to try to compare the profile and behavior of original applications, such as Dhrystone are called as
• Data-level parallelism/task-level parallelism in a tightly coupled hardware which allows interaction among parallel threads, are processed by
• The no of dies/wafer is approximately the area of wafer which is divided by the area of this die. It is estimated by
• In switching transistors the traditional primary energy-consumption, also called
• Power is energy/unit time: 1 watt =
• Desktop benchmarks; which are divided into a
• MISD data stream is the abbreviation of
• A time between the start and accomplishment of an event, is called a
• A 2nd key feature of server systems is
• Reporting performance measurements' guiding principle would be
• If floating-point instructions are not being executed, then the floating-point unit will have a clock of
• Processor A having 20% higher power-consumption than the processor B, but if processorA executes task in only 70% of average time needed by B, then its energy consumption will be
• Products being sold by multiple vendors in very large number are called
• The response time matters in the commercial market, uses like:
• Transistor density increasing by 35%/year, quadrupling over the 4years, the given technology is known as
• In floating point instruction format the Opcode contains
• Size of computer accumulator register can be of
• Computer component which is fastest is
• In computer, size of DI, SI, SP and BP stack control register is
• Register used as a working area in CPU is
• Fetch operation are not required in
• Example of implied addressing is
• Which of the following is not a kind of register?
• In an instruction, address part points to the address of the actual data, than the address mode is
• Addressing mode used in the instruction PUSH B, is
• Immediate addressing mode of instruction provides the operand in the memory location to
• Addressing mode used in an instruction of the form ADD X, Y, is
• Which of the following is not the type of computer register?
• Component used to store one or more bit of data and can accept and/or transfer information serially is called
• Computer register which collects the result of computation is called
• Temporary storage area within CPU is called
• In register addressing mode operands are looked in
• Computer register which is used to keep track of address of the memory location where the next instruction is located is
• In the indirect address mode,

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